1. Field of the Invention
The present invention relates to a data supply method in the processing of image data, and an image processing technique using the data supply method.
2. Description of Related Art
In digital copy machines and printers, image processing such as smoothing, scaling and edge enhancement is performed on input images that are obtained by a scanner or the like before outputting the images. Such image processing is also performed on images to be used on the World Wide Web (WWW) and images to be used in AV equipment such as TV and DVD. Existing image processing apparatus that perform such image processing include a line memory that serves as an intermediate storage unit, and carries out processing by temporarily storing an input image stored in a page memory in line-by-line fashion into the line memory.
The number of line memories that are included in such an image processing apparatus differs depending on the position of the pixels that are necessary for image processing. For example, performing the 3×3 filtering on an input image requires two line memories: one for storing data of a second previous line (data of each line is referred to hereinafter simply as line data) and one for immediately previous line data. An image processing apparatus carries out the filtering with the use of present line data and line data that are stored in the two line memories. As the size of the filter is larger, the number of necessary line memories increases.
Recently, the resolution and the filter size are on the increase in order to provide a better image quality. Accordingly, the capacity of one line memory and the number of line memories are also ever increasing.
Japanese Unexamined Patent Application Publication No. 2000-251065 (Yamada) discloses an image processing apparatus that aims at suppressing an increase in the capacity of a line memory. FIG. 19 (which corresponds to FIG. 1 in Yamada) shows the configuration of an image processing apparatus 10 that is disclosed therein. The image processing apparatus 10 includes a page memory 12, a segment read unit 14, an image processing ASIC 18, and a line reconstruction unit 20. The image processing ASIC 18 includes a segment memory 22, a segment memory 24, and an image processing unit 26.
The segment read unit 14 divides the page memory 12 into a plurality (nine in the example of FIG. 19) of blocks, and reads data in block-by-block fashion. Specifically, the segment read unit 14 reads data in the main scanning direction (in the direction of the arrow A in FIG. 19) and outputs data of one line (segment) in one block (which is segment data; e.g. the portion C in FIG. 19) to the image processing ASIC 18. The segment read unit 14 repeats the reading in the same block in units of segments in the sub scanning direction (in the direction of the arrow B in FIG. 19), and, after finishing the reading of one block, it then proceeds to read the next block.
The image processing unit 26 in the image processing ASIC 18 performs the 3×3 filtering, for example, on the segment data from the segment read unit 14. In addition to the segment data from the segment read unit 14, the segment data that are stored in the segment memory 22 and the segment memory 24 are supplied to the image processing unit 26.
The segment data that is output from the segment read unit 14 is supplied to the segment memory 22, and the segment data that is output from the segment memory 22 is supplied to the segment memory 24. Because the segment memory 22 and the segment memory 24 are FIFO (First-In First-Out) memories, the second previous segment data is stored in the segment memory 24, and the previous segment data is stored in the segment memory 22.
In this manner, the image processing unit 26 receives the same number of pieces of segment data as the pixels necessary for the 3×3 filtering in the sub scanning direction, which is three. Because the filtered segment data is in the order of blocks that is the same as the order of reading by the segment read unit 14, it is necessary to reconstruct the line data by the line reconstruction unit 20.
The segment read unit 14 has an pixel overlap read function, and, if a peripheral pixel to be referred to (which is referred to hereinafter as a reference pixel) of a target pixel on which filtering is performed is located in an adjacent block, it reads the pixel that is located in the adjacent block (overlap pixel) and supplies it to the image processing unit 26. For example, as shown in (a) of FIG. 20, if a target pixel (indicated by a black circle) is located at the right end of the block 1, the three pixels at the right side of its reference pixels (white circles within the dotted-line frame) are located in the adjacent block 2. Likewise, as shown in (b) of FIG. 20, if a target pixel is located at the left end of the block 2, the three pixels at the left side of its reference pixels are located in the adjacent block 1. With the pixel overlap read function, the segment read unit 14 can read reference pixels and supply them to the image processing ASIC 18 even when a target pixel and reference pixels are located in different blocks. Although FIG. 20 shows the example where reference pixels are located in another block that is adjacent to the block having a target block in the main scanning direction, this is the same for the case where reference pixels are located in another block that is adjacent to the block having a target block in the sub scanning direction.
As described above, though a line memory of the existing image processing apparatus needs to have a capacity to store data of one line of an input image, the segment memory 22 and the segment memory 24 of the image processing apparatus 10 only need to have a capacity to store data of one segment, thus enabling reduction of the capacity of line memories.
The number of overlap pixels in one block is as follows. In FIG. 21, the pixels within the dotted-line frame correspond to the data that need to be read to process data of one block in the 3×3 filtering. As shown in FIG. 21, the segment read unit 14 needs to read all the pixels on the outer edge of the block 2, which are indicated by black circles, in order to process the data of the block 2.
In the example of FIGS. 20 and 21, reference pixels are adjacent to a target pixel. However, depending on the type of filtering, there can be a reference pixel that is away from a target pixel by n number (n is a natural number of two or above) of pixels. For example, as shown in FIG. 22, a pixel at the lower right end of the pixels within the dotted-line frame is a target pixel, and data necessary for arithmetic processing is the data of the pixels indicated by black circles, which are, the target pixel, a pixel that is in the same line as the target pixel and away from the target pixel by three pixels in the direction opposite to the main scanning direction, a pixel that is in the previous line of the target pixel and at the same position as the target pixel in the main scanning direction, and a target that is in the previous line of the target pixel and away from the target pixel by three pixels in the direction opposite to the main scanning direction. In such arithmetic processing, in order to process the data of the block 2, the segment read unit 14 needs to read not only the pixels in the block 2 but also all the pixels indicated by black circles which are outside the pixel 2 as shown in FIG. 23. This leads to an increase in the circuit size of a section to implement the pixel overlap read function.
Further, the segment read unit 14 needs to perform address calculation for reading overlap pixels, which also causes an increase in the circuit size.
Furthermore, when the image processing apparatus 10 outputs the data that is processed in units of blocks, it is necessary to reconstruct the data in units of lines. The image processing apparatus 10 includes the line reconstruction unit 20 for this purpose, which also causes an increase in the circuit size.